Invention Grant
US07987313B2 Circuit of on-chip network having four-node ring switch structure 有权
具有四节点环形开关结构的片上网络电路

Circuit of on-chip network having four-node ring switch structure
Abstract:
A hierarchical ring architecture is constructed with on-chip networks. The on-chip network includes two type-0 ring nodes and two type-1 ring nodes. Multiple data transfer is provided in parallel between multiple processor cores or multiple functional units and register banks with a dynamic configuration. A low control complexity, an optimized local bandwidth, an optimized remote node path, a low routing complexity, and a simplified circuit is thus obtained.
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