Invention Grant
- Patent Title: Reconfigurable device
- Patent Title (中): 可重新配置的设备
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Application No.: US12213959Application Date: 2008-06-26
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Publication No.: US07987398B2Publication Date: 2011-07-26
- Inventor: Toshirou Kitaoka , Taro Fujii
- Applicant: Toshirou Kitaoka , Taro Fujii
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn Intellectual Property Law Group, PLLC
- Priority: JP2007-174107 20070702
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G11C29/00 ; G06F13/00 ; G06F7/38

Abstract:
Disclosed is a reconfigurable device including at least a bus that mutually connects functional blocks, a configuration information memory disposed corresponding to each of the functional blocks, an error detection circuit that detects an error in the configuration information memory, and a buffer which is on-off controlled based on information stored in the configuration information memory and each of which controls connection between each of the functional blocks and each bus. When an error in the configuration information memory is detected by the error detection circuit, the buffer with an output thereof connected to the bus is set to an off-state, based on a result of error detection.
Public/Granted literature
- US20090013219A1 Reconfigurable device Public/Granted day:2009-01-08
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