Invention Grant
US07987407B2 Handling of hard errors in a cache of a data processing apparatus
有权
处理数据处理装置的高速缓存中的硬错误
- Patent Title: Handling of hard errors in a cache of a data processing apparatus
- Patent Title (中): 处理数据处理装置的高速缓存中的硬错误
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Application No.: US12461695Application Date: 2009-08-20
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Publication No.: US07987407B2Publication Date: 2011-07-26
- Inventor: Damien Rene Gille , Luc Orion
- Applicant: Damien Rene Gille , Luc Orion
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Main IPC: G11C29/00
- IPC: G11C29/00

Abstract:
A data processor includes a cache record error storage and a hard error storage having at least one record error storage and at least one hard error record, respectively, both for keeping track of errors detected when accessing cache records. When an error is first detected, one of the error records in the cache record error storage is allocated to store a cache record identifier for that cache record, and an associated count value is set to a first value. If an error is detected when accessing a cache record, a correction operation is performed in respect of that currently accessed cache record, and access to that currently accessed cache record is then re-performed. If the count value reaches a predetermined threshold value, then the cache record identifier is moved from the cache record error storage to an error record of the hard error storage.
Public/Granted literature
- US20110047408A1 Handling of hard errors in a cache of a data processing apparatus Public/Granted day:2011-02-24
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