Invention Grant
- Patent Title: Warpage resistant semiconductor package and method for manufacturing the same
- Patent Title (中): 抗翘曲半导体封装及其制造方法
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Application No.: US12848472Application Date: 2010-08-02
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Publication No.: US07989264B2Publication Date: 2011-08-02
- Inventor: Chang Jun Park
- Applicant: Chang Jun Park
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2007-0123758 20071130
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A semiconductor package and a method for manufacturing the same is provided for minimizing or preventing warpage and twisting of semiconductor chip bodies as a result of thinning them during gringing. The semiconductor package includes a semiconductor chip body and a substrate. The semiconductor chip body has a first surface, a second surface facing away from the first surface, through-electrodes which pass through the semiconductor chip body and project from the second surface, and a warpage prevention part which projects in the shape of a fence along an edge of the second surface. The substrate has a substrate body and connection pads which are formed on an upper surface of the substrate body, facing the second surface, and which are connected with the projecting through-electrodes.
Public/Granted literature
- US20100317151A1 WARPAGE RESISTANT SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2010-12-16
Information query
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