Invention Grant
- Patent Title: Method for manufacturing dual gate in semiconductor device
- Patent Title (中): 半导体器件双栅极制造方法
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Application No.: US12104819Application Date: 2008-04-17
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Publication No.: US07989281B2Publication Date: 2011-08-02
- Inventor: Hyun Phill Kim
- Applicant: Hyun Phill Kim
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Priority: KR10-2007-0100573 20071005
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
Provided is a method for manufacturing a dual gate in a semiconductor device. The method includes forming a gate insulating layer and a gate conductive layer on a semiconductor substrate, forming a diffusion barrier layer on the gate conductive layer, forming a barrier metal layer on the diffusion barrier layer, depositing a first gate metal layer on the barrier metal layer, forming a metal nitride barrier layer on a surface of the first gate metal layer by supplying nitrogen (N2) plasma on the first gate metal layer, forming a second gate metal layer on the metal nitride barrier layer, and forming a hard mask layer on the second gate metal layer.
Public/Granted literature
- US20090093097A1 Method for Manufacturing Dual Gate in Semiconductor Device Public/Granted day:2009-04-09
Information query
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