Invention Grant
US07989356B2 Semiconductor device and method of forming enhanced UBM structure for improving solder joint reliability
有权
半导体器件和形成增强型UBM结构的方法,以提高焊点的可靠性
- Patent Title: Semiconductor device and method of forming enhanced UBM structure for improving solder joint reliability
- Patent Title (中): 半导体器件和形成增强型UBM结构的方法,以提高焊点的可靠性
-
Application No.: US12410260Application Date: 2009-03-24
-
Publication No.: US07989356B2Publication Date: 2011-08-02
- Inventor: Xusheng Bao , Yaojian Lin , Tae Hoan Jang
- Applicant: Xusheng Bao , Yaojian Lin , Tae Hoan Jang
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group
- Agent Robert D. Atkins
- Main IPC: H01L23/498
- IPC: H01L23/498

Abstract:
A semiconductor device has a first conductive layer formed over a substrate. A first insulating layer is formed over the first conductive layer. A second conductive layer is formed over first insulating layer and first conductive layer. A third insulating layer is formed over the second insulating layer and second conductive layer. An under bump metallization layer (UBM) is formed over the third insulating layer and second conductive layer. A UBM build-up structure is formed over the UBM. The UBM build-up structure has a sloped sidewall and is confined within a footprint of the UBM. The UBM build-up structure extends above the UBM to a height of 2-20 micrometers. The UBM build-up structure is formed in sections occupying less than an area of the UBM. A solder bump is formed over the UBM and UBM build-up structure. The sections of the UBM build-up structure provide exits for flux vapor escape.
Public/Granted literature
- US20100244239A1 Semiconductor Device and Method of Forming Enhanced UBM Structure for Improving Solder Joint Reliability Public/Granted day:2010-09-30
Information query
IPC分类: