Invention Grant
- Patent Title: MOS devices with improved source/drain regions with SiGe
- Patent Title (中): 具有SiGe源极/漏极区域改善的MOS器件
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Application No.: US11796369Application Date: 2007-04-27
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Publication No.: US07989901B2Publication Date: 2011-08-02
- Inventor: Chun-Chieh Lin , Wei-Hua Hsu , Yu-En Percy Chang , Chung Li Chang , Chi-Feng Cheng , Win Hung , Kishimoto Ko
- Applicant: Chun-Chieh Lin , Wei-Hua Hsu , Yu-En Percy Chang , Chung Li Chang , Chi-Feng Cheng , Win Hung , Kishimoto Ko
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/78
- IPC: H01L29/78

Abstract:
A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; a SiGe region in the semiconductor substrate and adjacent the gate stack, wherein the SiGe region has a first atomic percentage of germanium to germanium and silicon; and a silicide region over the SiGe region. The silicide region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is substantially lower than the first atomic percentage.
Public/Granted literature
- US20080265256A1 MOS devices with improved source/drain regions with SiGe Public/Granted day:2008-10-30
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