Invention Grant
US07989912B2 Semiconductor device having a compressed device isolation structure 有权
具有压缩器件隔离结构的半导体器件

Semiconductor device having a compressed device isolation structure
Abstract:
The semiconductor device includes a lower device isolation structure formed in a semiconductor substrate to define an active region. The lower device isolation structure has a first compressive stress. An upper device isolation structure is disposed over the lower device isolation structure. The upper device isolation structure has a second compressive stress greater than the first compressive stress. A gate structure is disposed over the active region between the neighboring upper device isolation structures.
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