Invention Grant
- Patent Title: Semiconductor chip and semiconductor device
- Patent Title (中): 半导体芯片和半导体器件
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Application No.: US12529443Application Date: 2008-02-29
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Publication No.: US07990747B2Publication Date: 2011-08-02
- Inventor: Eiji Hankui , Toshihide Kuriyama , Hideki Sasaki , Muneo Fukaishi
- Applicant: Eiji Hankui , Toshihide Kuriyama , Hideki Sasaki , Muneo Fukaishi
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Priority: JP2007-060352 20070309
- International Application: PCT/JP2008/053612 WO 20080229
- International Announcement: WO2008/111409 WO 20080918
- Main IPC: G11C5/06
- IPC: G11C5/06

Abstract:
There are provided a semiconductor device and a semiconductor chip, in which the interconnection is made to be highly reliable by stacking three or more layers of chips without contact therebetween. A semiconductor chip of the present invention comprises a first signal transmission circuit, a silicon substrate on which a first changeover switch is formed, and an interconnection layer on which a first capacitive-coupling upper electrode is formed, wherein a first capacitive-coupling lower electrode is additionally formed on the rear surface of the silicon substrate through a first via hole that penetrates the silicon substrate and, whereas the first capacitive-coupling upper electrode is directly connected to the first signal transmission circuit, the first capacitive-coupling lower electrode is connected to the first signal transmission circuit through the first via hole and through the first changeover switch.
Public/Granted literature
- US20100097159A1 SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE Public/Granted day:2010-04-22
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