Invention Grant
- Patent Title: Method and system for defect detection in manufacturing integrated circuits
- Patent Title (中): 制造集成电路中缺陷检测的方法和系统
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Application No.: US12258786Application Date: 2008-10-27
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Publication No.: US07991497B2Publication Date: 2011-08-02
- Inventor: Paul Kuang-Chi Lin , Sophia Zhang
- Applicant: Paul Kuang-Chi Lin , Sophia Zhang
- Applicant Address: CN Shanghai
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee Address: CN Shanghai
- Agency: Kilpatrick Townsend and Stockton LLP
- Priority: CN200810040282 20080702
- Main IPC: G06F19/00
- IPC: G06F19/00

Abstract:
Method and system for defect detection in manufacturing integrated circuits. In an embodiment, the invention provides a method for identifying one or more sources for possible causing manufacturing detects in integrated circuits. The method includes a step for providing a plurality of semiconductor substrates. The method includes a step for processing the plurality of semiconductor substrates in a plurality of processing steps using a plurality of processing tools. The method additionally includes a step for providing a database, which includes data associated with the processing of the plurality of semiconductor substrates. The method further includes a step for testing the plurality of semiconductor wafers after the processing of the plurality of semiconductor substrates. Additionally, the method includes a step for detecting at least one defect characteristic associated with the plurality of the semiconductor substrates that have been processed. Moreover, the method includes a step for identifying a set of processing steps. For example, the set of processing step are possibly associated with the defect characteristic.
Public/Granted literature
- US20100004775A1 METHOD AND SYSTEM FOR DEFECT DETECTION IN MANUFACTURING INTEGRATED CIRCUITS Public/Granted day:2010-01-07
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