Invention Grant
- Patent Title: Reduction of latency in store and forward architectures utilizing multiple internal bus protocols
- Patent Title (中): 使用多个内部总线协议减少存储和转发架构中的延迟
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Application No.: US12058984Application Date: 2008-03-31
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Publication No.: US07991927B2Publication Date: 2011-08-02
- Inventor: John Udell , Jeffrey K. Whitt
- Applicant: John Udell , Jeffrey K. Whitt
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Cochran Freund & Young LLC
- Agent William W. Cochran
- Main IPC: G06F13/38
- IPC: G06F13/38

Abstract:
Disclosed is a store and forward device that reduces latency. The store and forward device allows front end devices having various transfer protocols to be connected in a single path through a RAM, while reducing latency. Front end devices that transfer data on a piecemeal basis are required to transfer all of the data to a RAM prior to downloading data to a back end. Front end devices that transfer data in a single download begin the transfer of data out of a RAM as soon as a threshold value is reached. Hence, the latency associated with downloading all of the data into a RAM 118 and then transferring all of the data out of the RAM is eliminated.
Public/Granted literature
- US20090248968A1 REDUCTION OF LATENCY IN STORE AND FORWARD ARCHITECTURES UTILIZING MULTIPLE INTERNAL BUS PROTOCOLS Public/Granted day:2009-10-01
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