Invention Grant
US07991977B2 Advanced processor translation lookaside buffer management in a multithreaded system
失效
多线程系统中的高级处理器转换后备缓冲区管理
- Patent Title: Advanced processor translation lookaside buffer management in a multithreaded system
- Patent Title (中): 多线程系统中的高级处理器转换后备缓冲区管理
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Application No.: US11961910Application Date: 2007-12-20
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Publication No.: US07991977B2Publication Date: 2011-08-02
- Inventor: David T. Hass , Basab Mukherjee
- Applicant: David T. Hass , Basab Mukherjee
- Applicant Address: US CA Santa Clara
- Assignee: NetLogic Microsystems, Inc.
- Current Assignee: NetLogic Microsystems, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Vista IP Law Group, LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F15/173

Abstract:
An advanced processor comprises a plurality of multithreaded processor cores each having a data cache and instruction cache. A data switch interconnect is coupled to each of the processor cores and configured to pass information among the processor cores. A messaging network is coupled to each of the processor cores and a plurality of communication ports. In one aspect of an embodiment of the invention, the data switch interconnect is coupled to each of the processor cores by its respective data cache, and the messaging network is coupled to each of the processor cores by its respective message station. Advantages of the invention include the ability to provide high bandwidth communications between computer systems and memory in an efficient and cost-effective manner.
Public/Granted literature
- US20080216074A1 ADVANCED PROCESSOR TRANSLATION LOOKASIDE BUFFER MANAGEMENT IN A MULTITHREADED SYSTEM Public/Granted day:2008-09-04
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