Invention Grant
- Patent Title: Peripheral device, integrated circuit for peripheral device and method for analyzing failure of peripheral device
- Patent Title (中): 外围设备，外围设备集成电路及外围设备故障分析方法
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Application No.: US12376257Application Date: 2007-08-03
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Publication No.: US07992041B2Publication Date: 2011-08-02
- Inventor: Kazushi Yamamoto
- Applicant: Kazushi Yamamoto
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2006-212487 20060803
- International Application: PCT/JP2007/065245 WO 20070803
- International Announcement: WO2008/016136 WO 20080207
- Main IPC: G06F11/00
- IPC: G06F11/00
Abstract:
The peripheral device through an interface cable, and includes a second memory device for storing an evaluation program for evaluating the peripheral device and its integrated circuit. A detection section detects whether the mode indicating signal which is transmitted from the computer indicates a test mode or a normal mode, and a starting means starts the evaluation program on the second memory device when the detection section detects that the mode indicates signal a test mode.
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