Invention Grant
- Patent Title: Data slicer having an error correction device
- Patent Title (中): 具有纠错装置的数据限幅器
-
Application No.: US11944433Application Date: 2007-11-22
-
Publication No.: US07992077B2Publication Date: 2011-08-02
- Inventor: Chieh-Cheng Chen , Ho-Lin Wang , Ting Chiou
- Applicant: Chieh-Cheng Chen , Ho-Lin Wang , Ting Chiou
- Applicant Address: TW Hsinchu Science Park, Hsin-Chu
- Assignee: NOVATEK Microelectronics Corp.
- Current Assignee: NOVATEK Microelectronics Corp.
- Current Assignee Address: TW Hsinchu Science Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Priority: TW96129396A 20070809
- Main IPC: G06F7/02
- IPC: G06F7/02 ; G06F11/00

Abstract:
A data slicer includes an error bit predictor, a DC level compensator, a co-channel detector, and an output device. The data slicer generates four bytes according to four slicing levels respectively. The four slicing levels are a DC level, a level generated by adding a predetermined offset to the DC level, a level generated by subtracting the predetermined offset from the DC level, and a compensated level generated by the DC level compensator. The co-channel detector determines if the compensated level has the co-channel interference. The output device generates an output byte according to indication signals generated by the co-channel detector and the error bit predictor and the parity check of the four bytes.
Public/Granted literature
- US20090044087A1 Data Slicer Having An Error Correction Device Public/Granted day:2009-02-12
Information query