Invention Grant
- Patent Title: Manufacturing method of semiconductor device including active layer of zinc oxide with controlled crystal lattice spacing
- Patent Title (中): 包括具有受控晶格间距的氧化锌活性层的半导体器件的制造方法
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Application No.: US12509852Application Date: 2009-07-27
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Publication No.: US07993964B2Publication Date: 2011-08-09
- Inventor: Takashi Hirao , Takahiro Hiramatsu , Mamoru Furuta , Hiroshi Furuta , Tokiyoshi Matsuda
- Applicant: Takashi Hirao , Takahiro Hiramatsu , Mamoru Furuta , Hiroshi Furuta , Tokiyoshi Matsuda
- Applicant Address: JP Kochi-shi JP Tokyo
- Assignee: Kochi Industrial Promotion Center,Casio Computer Co., Ltd.
- Current Assignee: Kochi Industrial Promotion Center,Casio Computer Co., Ltd.
- Current Assignee Address: JP Kochi-shi JP Tokyo
- Agency: Holtz, Holtz, Goodman & Chick, PC
- Priority: JP2006-155188 20060602; JP2006-155189 20060602; JP2007-037176 20070216
- Main IPC: H01L21/16
- IPC: H01L21/16 ; H01L21/00 ; H01L21/84
Abstract:
A manufacturing method of a semiconductor device includes forming an oxide semiconductor thin film layer of zinc oxide, wherein at least a portion of the oxide semiconductor thin film layer in an as-deposited state includes lattice planes having a preferred orientation along a direction perpendicular to the substrate and a lattice spacing d002 of at least 2.619 Å.
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