Invention Grant
- Patent Title: Semiconductor device and method of fabricating the same
- Patent Title (中): 半导体装置及其制造方法
-
Application No.: US12615309Application Date: 2009-11-10
-
Publication No.: US07993992B2Publication Date: 2011-08-09
- Inventor: Hisashi Ohtani , Etsuko Fujimoto
- Applicant: Hisashi Ohtani , Etsuko Fujimoto
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP8-307443 19961031
- Main IPC: H01L21/84
- IPC: H01L21/84

Abstract:
There is disclosed a method of fabricating TFTs having reduced interconnect resistance by having improved contacts to source/drain regions. A silicide layer is formed in intimate contact with the source/drain regions. The remaining metallization layer is selectively etched to form a contact pad or conductive interconnects.
Public/Granted literature
- US20100055852A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Public/Granted day:2010-03-04
Information query
IPC分类: