Poly profile engineering to modulate spacer induced stress for device enhancement

Invention Grant

US07993997B2 Poly profile engineering to modulate spacer induced stress for device enhancement 有权

Title translation: 聚轮廓工程用于调制间隔物诱发的应力用于器件增强

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Patent Title: Poly profile engineering to modulate spacer induced stress for device enhancement
Patent Title (中): 聚轮廓工程用于调制间隔物诱发的应力用于器件增强
Application No.: US11865563

Application Date: 2007-10-01
Publication No.: US07993997B2

Publication Date: 2011-08-09
Inventor: Vincent Ho , Wenhe Lin , Young Way Teh , Yong Kong Siew , Bei Chao Zhang , Fan Zhang , Haifeng Sheng , Juan Boon Tan
Applicant: Vincent Ho , Wenhe Lin , Young Way Teh , Yong Kong Siew , Bei Chao Zhang , Fan Zhang , Haifeng Sheng , Juan Boon Tan
Applicant Address: SG Singapore
Assignee: Globalfoundries Singapore Pte. Ltd.
Current Assignee: Globalfoundries Singapore Pte. Ltd.
Current Assignee Address: SG Singapore
Agency: Horizon IP Pte. Ltd.
Main IPC: H01L21/8238
IPC: H01L21/8238 ; H01L21/336

Abstract:

The present invention provides a method of inducing stress in a semiconductor device substrate by applying an ion implantation to a gate region before a source/drain annealing process. The source/drain region may then be annealed along with the gate which will cause the gate to expand in certain areas due to said ion implantation. As a result, stress caused by said expansion of the gate is transferred to the channel region in the semiconductor substrate.

Abstract(Chinese):

本发明提供了一种通过在源/漏退火处理之前将栅极区域施加离子注入来在半导体器件衬底中引起应力的方法。然后可以将栅极/漏极区域与栅极退火，由于所述离子注入将导致栅极在某些区域中膨胀。结果，由栅极的所述膨胀引起的应力被转移到半导体衬底中的沟道区域。

Public/Granted literature

US20090085122A1 POLY PROFILE ENGINEERING TO MODULATE SPACER INDUCED STRESS FOR DEVICE ENHANCEMENT Public/Granted day:2009-04-02

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS