Trenched power semiconductor structure with schottky diode and fabrication method thereof

Invention Grant

US07994001B1 Trenched power semiconductor structure with schottky diode and fabrication method thereof 有权

Title translation: 具有肖特基二极管的倾斜功率半导体结构及其制造方法

Please log in to see more content

Patent Title: Trenched power semiconductor structure with schottky diode and fabrication method thereof
Patent Title (中): 具有肖特基二极管的倾斜功率半导体结构及其制造方法
Application No.: US12777481

Application Date: 2010-05-11
Publication No.: US07994001B1

Publication Date: 2011-08-09
Inventor: Hsiu Wen Hsu , Chun Ying Yeh
Applicant: Hsiu Wen Hsu , Chun Ying Yeh
Applicant Address: TW Taipei County
Assignee: Great Power Semiconductor Corp.
Current Assignee: Great Power Semiconductor Corp.
Current Assignee Address: TW Taipei County
Agency: Rosenberg, Klein & Lee
Main IPC: H01L21/8234
IPC: H01L21/8234 ; H01L21/44 ; H01L29/66

Trenched power semiconductor structure with schottky diode and fabrication method thereof

Abstract:

A fabrication method of a trenched power semiconductor structure with a schottky diode is provided. Firstly, a drain region is formed in a substrate. Next, at least two gate structures are formed above the drain region, and then, a body and at least a source region are formed between the two adjacent gate structures. Thereafter, a first dielectric structure is formed on the gate structure to shield the gate structure. Then, a contact window is formed in the body and has side surface thereof adjacent to the source region to expose the source region. Afterward, a second dielectric structure is formed in the contact window. Next, by using the second dielectric structure as an etching mask, the body is etched to form a narrow trench extending to the drain region below the body. Finally, a metal layer is filled into the contact window and the narrow trench.

Abstract(Chinese):

提供了具有肖特基二极管的沟槽功率半导体结构的制造方法。首先，在衬底中形成漏区。接下来，在漏极区域上形成至少两个栅极结构，然后在两个相邻栅极结构之间形成主体和至少一个源极区域。此后，在栅极结构上形成第一电介质结构以屏蔽栅极结构。然后，在主体中形成接触窗口，并且具有与源区域相邻的侧表面以暴露源区域。之后，在接触窗中形成第二电介质结构。接下来，通过使用第二电介质结构作为蚀刻掩模，蚀刻主体以形成延伸到主体下方的漏极区的窄沟槽。最后，将金属层填充到接触窗口和窄沟槽中。

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺