Invention Grant
US07994069B2 Semiconductor wafer with low-K dielectric layer and process for fabrication thereof
有权
具有低K电介质层的半导体晶片及其制造方法
- Patent Title: Semiconductor wafer with low-K dielectric layer and process for fabrication thereof
- Patent Title (中): 具有低K电介质层的半导体晶片及其制造方法
-
Application No.: US11910054Application Date: 2005-03-31
-
Publication No.: US07994069B2Publication Date: 2011-08-09
- Inventor: Brad Smith , Cindy Goldberg , Robert E. Jones
- Applicant: Brad Smith , Cindy Goldberg , Robert E. Jones
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- International Application: PCT/EP2005/004649 WO 20050331
- International Announcement: WO2006/102926 WO 20061005
- Main IPC: H01L21/31
- IPC: H01L21/31

Abstract:
To improve the mechanical strength of a wafer comprising a low-k dielectric layer, the low-k dielectric layer is formed so as to have certain regions of low dielectric constant and the remainder having a higher mechanical strength. The higher-strength regions may have a relatively-higher value of dielectric constant. Selective ultraviolet curing of a dielectric material can be performed so as to expel a porogen from the region(s) desired to have low dielectric constant. A photomask, hardmask, or opaque resist, patterned so as to define the region(s) to have lower dielectric constant, is used to shield the remainder of the dielectric material from the ultraviolet radiation. Alternatively, a layer of dielectric material can be blanket cured to lower its dielectric constant, then non-critical regions thereof can be selectively over-cured whereby to produce regions of increased mechanical strength.
Public/Granted literature
- US20080182379A1 Semiconductor Wafer With Low-K Dielectric Layer and Process For Fabrication Thereof Public/Granted day:2008-07-31
Information query
IPC分类: