Invention Grant
- Patent Title: Dual conversion gain gate and capacitor combination
- Patent Title (中): 双转换增益门和电容组合
-
Application No.: US12704778Application Date: 2010-02-12
-
Publication No.: US07994464B2Publication Date: 2011-08-09
- Inventor: Jeffrey A. McKee
- Applicant: Jeffrey A. McKee
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dickstein Shapiro LLP
- Main IPC: H01L29/72
- IPC: H01L29/72
Abstract:
A pixel cell array architecture having a dual conversion gain. A dual conversion gain element is coupled between a floating diffusion region and a respective storage capacitor. The dual conversion gain element having a control gate switches in the capacitance of the capacitor to change the conversion gain of the floating diffusion region from a first conversion gain to a second conversion gain. In order to increase the efficient use of space, the dual conversion gain element gate also functions as the bottom plate of the capacitor. In one particular embodiment of the invention, a high dynamic range transistor is used in conjunction with a pixel cell having a capacitor-DCG gate combination; in another embodiment, adjacent pixels share pixel components, including the capacitor-DCG combination.
Public/Granted literature
- US20100141631A1 DUAL CONVERSION GAIN GATE AND CAPACITOR COMBINATION Public/Granted day:2010-06-10
Information query
IPC分类:
