Invention Grant
- Patent Title: Semiconductor device and metal line fabrication method of the same
- Patent Title (中): 半导体器件和金属线制造方法相同
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Application No.: US12502813Application Date: 2009-07-14
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Publication No.: US07994541B2Publication Date: 2011-08-09
- Inventor: Jong Soon Lee
- Applicant: Jong Soon Lee
- Applicant Address: KR Seoul
- Assignee: Dongbu HiTek Co., Ltd.
- Current Assignee: Dongbu HiTek Co., Ltd.
- Current Assignee Address: KR Seoul
- Agency: Sherr & Vaughn, PLLC
- Priority: KR10-2005-0134348 20051229
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
Embodiments relate to a method for forming a wiring in a semiconductor device, that may include laminating a conductive layer for wiring formation on a semiconductor substrate, forming a photoresist layer pattern on the conductive layer, performing primary dry etching for the conductive layer after employing the photoresist layer pattern as a mask, thereby forming a wiring pattern, partially removing the photoresist layer pattern through secondary dry etching, thereby forming a passivation layer on a surface of the wiring pattern, performing tertiary dry etching for the wiring pattern and a diffusion barrier after employing the photoresist layer pattern as a mask, thereby forming a metal wiring, and removing the photoresist layer pattern.
Public/Granted literature
- US20090273091A1 SEMICONDUCTOR DEVICE AND METAL LINE FABRICATION METHOD OF THE SAME Public/Granted day:2009-11-05
Information query
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