Invention Grant
US07994545B2 Methods, structures, and designs for self-aligning local interconnects used in integrated circuits
有权
用于集成电路中使用的自对准局部互连的方法,结构和设计
- Patent Title: Methods, structures, and designs for self-aligning local interconnects used in integrated circuits
- Patent Title (中): 用于集成电路中使用的自对准局部互连的方法,结构和设计
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Application No.: US12814411Application Date: 2010-06-11
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Publication No.: US07994545B2Publication Date: 2011-08-09
- Inventor: Michael C. Smayling , Scott T. Becker
- Applicant: Michael C. Smayling , Scott T. Becker
- Applicant Address: US CA Los Gatos
- Assignee: Tela Innovations, Inc.
- Current Assignee: Tela Innovations, Inc.
- Current Assignee Address: US CA Los Gatos
- Agency: Martine Penilla & Gencarella, LLP
- Main IPC: H01L23/52
- IPC: H01L23/52

Abstract:
Methods, structures and designs for self-aligned local interconnects are provided. The method includes designing diffusion regions to be in a substrate. Some of a plurality of gates are designed to be active gates and some of the plurality of gates are designed to be formed over isolation regions. The method includes designing the plurality of gates in a regular and repeating alignment along a same direction, and each of the plurality of gates are designed to have dielectric spacers. The method also includes designing a local interconnect layer between or adjacent to the plurality of gates. The local interconnect layer is conductive and disposed over the substrate to allow electrical contact and interconnection with or to some of the diffusion regions of the active gates. The local interconnect layer is self-aligned by the dielectric spacers of the plurality of gates.
Public/Granted literature
- US20100252896A1 Methods, Structures, and Designs for Self-Aligning Local Interconnects used in Integrated Circuits Public/Granted day:2010-10-07
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