A semiconductor memory device includes: a semiconductor substrate; a field effect transistor formed on the semiconductor substrate; an interlayer dielectric layer formed on the field effect transistor; a contact plug connected to the field effect transistor through the interlayer dielectric layer; and a ferroelectric capacitor disposed on the interlayer dielectric layer and connected to the contact plug, wherein a contact surface between a lower electrode of the ferroelectric capacitor and the contact plug is smaller than a contact plug surface of the contact plug.