Invention Grant
- Patent Title: Non-volatile memory cells formed in back-end-of line processes
- Patent Title (中): 形成在线路工序后端的非易失性存储单元
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Application No.: US11602065Application Date: 2006-11-20
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Publication No.: US07994564B2Publication Date: 2011-08-09
- Inventor: Shih Wei Wang
- Applicant: Shih Wei Wang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L21/8246 ; H01L21/8247
Abstract:
An integrated circuit device includes a substrate; a bottom electrode over the substrate wherein the bottom electrode is in or over a lowest metallization layer over the substrate; a blocking layer over the bottom electrode; a charge-trapping layer over the blocking layer; an insulation layer over the charge-trapping layer; a control gate over the insulation layer; a tunneling layer over the control gate; and a top electrode over the tunneling layer.
Public/Granted literature
- US20080116505A1 Non-volatile memory cells formed in back-end-of line processes Public/Granted day:2008-05-22
Information query
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