Invention Grant
- Patent Title: Power semiconductor module
- Patent Title (中): 功率半导体模块
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Application No.: US12451157Application Date: 2007-05-18
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Publication No.: US07994635B2Publication Date: 2011-08-09
- Inventor: Osamu Soda , Yuji Ohnishi , Kazunori Inami , Toshio Uchida
- Applicant: Osamu Soda , Yuji Ohnishi , Kazunori Inami , Toshio Uchida
- Applicant Address: JP Osaka
- Assignee: Sansha Electric Manufacturing Co., Ltd.
- Current Assignee: Sansha Electric Manufacturing Co., Ltd.
- Current Assignee Address: JP Osaka
- Agency: Rader, Fishman & Grauer PLLC
- International Application: PCT/JP2007/060252 WO 20070518
- International Announcement: WO2008/142760 WO 20081127
- Main IPC: H01L23/10
- IPC: H01L23/10 ; H01L23/34

Abstract:
To suppress warpage of a ceramic substrate, and to prevent a reduction in radiation efficiency.A power semiconductor module includes a module casing fitted with a radiator, and a common unit retained by the module casing. The common unit has: a ceramic substrate having a circuit surface disposed with a semiconductor element, and a radiation surface brought into abutting contact with the radiator; and a package formed by exposing the radiation surface and sealing the circuit surface with heat resistant resin. The circuit surface and the radiation surface are respectively formed of metal layers 51 formed on the ceramic substrate, and the metal layer 51 forming the radiation surface has: by forming a buffer pattern 512 including a groove part extending along a circumferential part thereof, a radiation pattern 510 formed on an inner side of the buffer pattern 512; and an outer peripheral pattern 511 formed on an outer side of the buffer pattern 512. Such a configuration enables warpage of the ceramic substrate to be suppressed, and a reduction in radiation efficiency to be prevented.
Public/Granted literature
- US20100127387A1 POWER SEMICONDUCTOR MODULE Public/Granted day:2010-05-27
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