An array substrate for a liquid crystal display device includes a substrate, a plurality of gate lines arranged transversely on the substrate, a plurality of data lines disposed orthogonal to the plurality of gate lines, a plurality of thin film transistors formed on the substrate adjacent to intersections of the gate lines and the data lines, each thin film transistor including a gate electrode, a gate insulation layer, an active layer, an ohmic contact layer, a source electrode, and a drain electrode, a plurality of pixel electrodes disposed at pixel regions defined by the intersections of the gate lines and the data lines, each pixel electrode connected to a corresponding one of the drain electrodes, and a metal layer formed on an entire surface of each of the data lines.