Invention Grant
US07995367B2 Circuit arrangement comprising a non-volatile memory cell and method
有权
包括非易失性存储单元和方法的电路装置
- Patent Title: Circuit arrangement comprising a non-volatile memory cell and method
- Patent Title (中): 包括非易失性存储单元和方法的电路装置
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Application No.: US12297082Application Date: 2007-04-12
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Publication No.: US07995367B2Publication Date: 2011-08-09
- Inventor: Peter Bösmüller , Johannes Fellner , Gregor Schatzberger
- Applicant: Peter Bösmüller , Johannes Fellner , Gregor Schatzberger
- Applicant Address: AT Unterpremstätten
- Assignee: austriamicrosystems AG
- Current Assignee: austriamicrosystems AG
- Current Assignee Address: AT Unterpremstätten
- Agency: Cohen Pontani Lieberman & Pavane LLP
- Priority: DE102006017480 20060413
- International Application: PCT/EP2007/003270 WO 20070412
- International Announcement: WO2007/118679 WO 20071025
- Main IPC: G11C5/06
- IPC: G11C5/06 ; G11C5/14 ; G11C7/00 ; G11C17/00
Abstract:
The circuit arrangement comprises a symmetrically constructed comparator (3), a non-volatile memory cell (10) and a reference element (20). The comparator (3) exhibits a latching function, and is connected in a differential current path that joins the power supply terminal (9) to a reference potential terminal (8). The non-volatile memory cell (10) is connected in a first branch (35) of the differential current path, and the reference element (20) is connected in a second branch (55) of the differential current path.
Public/Granted literature
- US20090219746A1 Circuit Arrangement Comprising a Non-Volatile Memory Cell and Method Public/Granted day:2009-09-03
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