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US07995416B2 Semiconductor memory device and operation method thereof 有权
半导体存储器件及其操作方法

Semiconductor memory device and operation method thereof
Abstract:
A semiconductor memory device includes a clock synchronizing unit for receiving a first power voltage through a first power voltage terminal, and an additional power voltage providing unit for additionally providing a second power voltage to the first power voltage terminal for a predetermined period after leaving a power down mode.
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