A method for transaction-based abstraction allows a comprehensive test plan to be automatically generated for a hardware design, where the test plan comprises a set of coverage points derived based on a signal classification created using transaction-based analysis to identify the architecturally-visible state of the design, using heuristic techniques to identify finite-state machines (FSMs) in a design that processes transactions, from which transaction boundaries can be identified, and wherein signals are classified based on the abstracted design as either transient, temporary, or persistent for use in developing the test plan.