Invention Grant
US07996572B2 Multi-node chipset lock flow with peer-to-peer non-posted I/O requests
有权
具有点对点非贴片I / O请求的多节点芯片组锁定流
- Patent Title: Multi-node chipset lock flow with peer-to-peer non-posted I/O requests
- Patent Title (中): 具有点对点非贴片I / O请求的多节点芯片组锁定流
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Application No.: US10859891Application Date: 2004-06-02
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Publication No.: US07996572B2Publication Date: 2011-08-09
- Inventor: Robert G. Blankenship , Robert J. Greiner , Herbert H. J. Hum , Kenneth C. Creta , Buderya S. Acharya
- Applicant: Robert G. Blankenship , Robert J. Greiner , Herbert H. J. Hum , Kenneth C. Creta , Buderya S. Acharya
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Caven & Aghevli LLC
- Main IPC: G06F3/00
- IPC: G06F3/00 ; G06F7/38
Abstract:
Systems and methods of managing transactions provide for receiving a first flush command at a first I/O hub, wherein the first flush command is dedicated to non-posted transactions. One embodiment further provides for halting an inbound ordering queue of the first I/O hub with regard to non-posted transactions in response to the first flush command and flushing a non-posted transaction from an outgoing buffer of the first I/O hub to a second I/O hub while the inbound ordering queue is halted with regard to non-posted transactions.
Public/Granted literature
- US20050273400A1 Multi-node chipset lock flow with peer-to-peer non-posted I/O requests Public/Granted day:2005-12-08
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