Invention Grant
- Patent Title: Multiport execution target delay queue FIFO array
- Patent Title (中): 多端口执行目标延迟队列FIFO数组
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Application No.: US12107289Application Date: 2008-04-22
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Publication No.: US07996655B2Publication Date: 2011-08-09
- Inventor: David A. Luick
- Applicant: David A. Luick
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Patterson & Sheridan LLP
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/40 ; G06F15/00

Abstract:
One embodiment provides a method of forwarding data in a processor. The method generally includes providing at least one cascaded delayed execution pipeline unit having at least a first pipeline and a second pipeline for executing first and second instructions in a common issue group, wherein the second pipeline executes the second instruction in a delayed manner relative to the execution of the first instruction in the first pipeline, storing results generated by an execution unit of the first pipeline in a first-in first-out (FIFO) storage target delay queue, determining if the target delay queue contains source data for executing the second instruction, and if the target delay queue contains source data for the second instruction, forwarding the source data for the second instruction from the target delay queue to an execution unit of the second pipeline.
Public/Granted literature
- US20090265527A1 Multiport Execution Target Delay Queue Fifo Array Public/Granted day:2009-10-22
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