Invention Grant
US07996695B2 Circuits and methods for sleep state leakage current reduction 有权
休眠状态漏电流的电路和方法降低

Circuits and methods for sleep state leakage current reduction
Abstract:
A circuit for reducing sleep state current leakage is described. The circuit includes a hardware unit selected from at least one of a latch, a flip-flop, a comparator, a multiplexer, or an adder. The hardware unit includes a first node. The hardware unit further includes a sleep enabled combinational logic coupled to the first node, wherein a value of the first node is preserved during a sleep state.
Public/Granted literature
Information query
Patent Agency Ranking
0/0