Invention Grant
- Patent Title: Memory having an ECC system
- Patent Title (中): 具有ECC系统的存储器
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Application No.: US12833613Application Date: 2010-07-09
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Publication No.: US07996734B2Publication Date: 2011-08-09
- Inventor: Adrian Earle , Raviprakrash S. Rao , Vineet Joshi
- Applicant: Adrian Earle , Raviprakrash S. Rao , Vineet Joshi
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: G11C29/00
- IPC: G11C29/00
Abstract:
An error correction code system for a memory is provided. The memory is provided with a parity array that is directly accessible. An embodiment of the error correction code system includes writing and reading test data directly to the parity array. The data read from the parity array is compared with the test data written to the parity array to detect errors.
Public/Granted literature
- US20100281302A1 Memory Having an ECC System Public/Granted day:2010-11-04
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