A multi-layer printed wiring board has a core substrate, a first interlayer insulation layer formed over the core substrate, a first filled via formed in the first interlayer insulation layer, a second interlayer insulation layer formed over the first interlayer insulation layer, and a second filled via formed in the second interlayer insulation layer. The first filled via has a bottom portion having a first diameter. The second filled via has a bottom portion having a second diameter smaller than the first diameter.