Invention Grant
- Patent Title: Method for fabricating 1T-DRAM on bulk silicon
- Patent Title (中): 在体硅上制造1T-DRAM的方法
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Application No.: US11674008Application Date: 2007-02-12
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Publication No.: US08008137B2Publication Date: 2011-08-30
- Inventor: Albert Wu , Roawen Chen
- Applicant: Albert Wu , Roawen Chen
- Applicant Address: BB St. Michael
- Assignee: Marvell World Trade Ltd.
- Current Assignee: Marvell World Trade Ltd.
- Current Assignee Address: BB St. Michael
- Main IPC: H01L21/84
- IPC: H01L21/84

Abstract:
An integrated circuit includes a bulk technology integrated circuit (bulk IC) including a bulk silicon layer and complementary MOSFET (CMOS) transistors fabricated thereon. The integrated circuit also includes a single transistor dynamic random access memory (1T DRAM) cell arranged adjacent to and integrated with the bulk IC.
Public/Granted literature
- US20070215906A1 METHOD FOR FABRICATING 1T-DRAM ON BULK SILICON Public/Granted day:2007-09-20
Information query
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