Invention Grant
US08008724B2 Structure and method to enhance both nFET and pFET performance using different kinds of stressed layers
有权
使用不同种类的应力层来增强nFET和pFET性能的结构和方法
- Patent Title: Structure and method to enhance both nFET and pFET performance using different kinds of stressed layers
- Patent Title (中): 使用不同种类的应力层来增强nFET和pFET性能的结构和方法
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Application No.: US10695748Application Date: 2003-10-30
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Publication No.: US08008724B2Publication Date: 2011-08-30
- Inventor: Bruce B. Doris , Haining Yang , Huilong Zhu
- Applicant: Bruce B. Doris , Haining Yang , Huilong Zhu
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Whitham, Curtis, Christofferson & Cook, P.C.
- Agent Joseph P. Abate
- Main IPC: H01L23/62
- IPC: H01L23/62

Abstract:
In producing complementary sets of metal-oxide-semiconductor (CMOS) field effect transistors, including nMOS and pMOS transistors), carrier mobility is enhanced or otherwise regulated through the use of layering various stressed films over either the nMOS or pMOS transistor (or both), depending on the properties of the layer and isolating stressed layers from each other and other structures with an additional layer in a selected location. Thus both types of transistors on a single chip or substrate can achieve an enhanced carrier mobility, thereby improving the performance of CMOS devices and integrated circuits.
Public/Granted literature
- US20050093030A1 Structure and method to enhance both nFET and pFET performance using different kinds of stressed layers Public/Granted day:2005-05-05
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