Invention Grant
- Patent Title: Delay line calibration circuit comprising asynchronous arbiter element
- Patent Title (中): 延迟线校准电路包括异步仲裁器元件
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Application No.: US11546888Application Date: 2006-10-12
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Publication No.: US08008907B2Publication Date: 2011-08-30
- Inventor: Mike Lewis
- Applicant: Mike Lewis
- Applicant Address: DE Munich
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Munich
- Agency: Maginot Moore & Beck
- Priority: EP06002663 20060209
- Main IPC: G01R23/175
- IPC: G01R23/175

Abstract:
A delay line calibration circuit is disclosed herein. The calibration circuit has an arbiter circuit having a unit for determining which of two signals that arrive first; a first and a second synchronous element each having an input for receiving a clock signal, and one of them having a unit for outputting the clock signal a clock period later; and a calibration circuit having inputs connected to the outputs of the arbiter circuit for receiving a signal from it indicative of whether the signal input to the arbiter circuit from the delay line is ahead or after the signal input to the arbiter circuit from the second element, the calibration circuit further being connected to the delay line for calibrating the delay line in accordance with the signal received from the arbiter circuit. The invention in at least one embodiment provides improved calibration of delay lines.
Public/Granted literature
- US20070182423A1 Delay line calibration circuit comprising asynchronous arbiter element Public/Granted day:2007-08-09
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