Invention Grant
- Patent Title: Method and circuit for eFuse protection
- Patent Title (中): eFuse保护的方法和电路
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Application No.: US12139106Application Date: 2008-06-13
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Publication No.: US08009397B2Publication Date: 2011-08-30
- Inventor: Melanie Etherton , Michael G. Khazhinsky , Eyal Melamed-Kohen , Valery Neiman
- Applicant: Melanie Etherton , Michael G. Khazhinsky , Eyal Melamed-Kohen , Valery Neiman
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Robert L. King; Charles Bergere
- Main IPC: H02H9/00
- IPC: H02H9/00

Abstract:
An eFuse (electronic fuse) circuit has a first detector for determining whether an ESD (electrostatic discharge) event occurs at a circuit pad of an integrated circuit and provides an ESD trigger signal in response thereto. A second detector detects a presence of a first power supply voltage and provides a power on signal indicating the presence of the first power supply voltage. A fuse is permitted to be programmable when no detection of the ESD event occurs and at the same time a presence of the power on signal is detected. The fuse is not permitted to be programmed when an ESD event is detected or when there is an absence of the power on signal. An array of fuses is thereby protected from inadvertent programming from an ESD event or powering up an integrated circuit.
Public/Granted literature
- US20090310266A1 METHOD AND CIRCUIT FOR eFUSE PROTECTION Public/Granted day:2009-12-17
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