Invention Grant
US08009468B2 Method for fabricating an integrated circuit including memory element with spatially stable material
有权
包括具有空间稳定材料的存储元件的集成电路的制造方法
- Patent Title: Method for fabricating an integrated circuit including memory element with spatially stable material
- Patent Title (中): 包括具有空间稳定材料的存储元件的集成电路的制造方法
-
Application No.: US12167853Application Date: 2008-07-03
-
Publication No.: US08009468B2Publication Date: 2011-08-30
- Inventor: Dieter Andres , Thomas Happ , Petra Majewski , Bernhard Ruf
- Applicant: Dieter Andres , Thomas Happ , Petra Majewski , Bernhard Ruf
- Applicant Address: DE Munich
- Assignee: Qimonda AG
- Current Assignee: Qimonda AG
- Current Assignee Address: DE Munich
- Agency: Edell, Shapiro & Finnan, LLC
- Main IPC: G11C11/00
- IPC: G11C11/00
Abstract:
A method for fabricating an integrated circuit, the method comprises forming a first electrode, depositing resistance changing material over the first electrode, the resistance changing material having an active zone for switching the resistance of the resistance changing material and an inactive zone, and forming a second electrode over the resistance changing material. The chemical composition of the resistance changing material in the active zone differs from the chemical composition of the resistance changing material in the inactive zone.
Public/Granted literature
- US20090052232A1 METHOD FOR FABRICATING AN INTEGRATED CIRCUIT INCLUDING MEMORY ELEMENT WITH SPATIALLY STABLE MATERIAL Public/Granted day:2009-02-26
Information query
