Invention Grant
- Patent Title: Method and system for PHY loop detection
- Patent Title (中): 用于PHY环路检测的方法和系统
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Application No.: US12756169Application Date: 2010-04-07
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Publication No.: US08009571B2Publication Date: 2011-08-30
- Inventor: Saravan Arunachalam , Hugh Barrass
- Applicant: Saravan Arunachalam , Hugh Barrass
- Applicant Address: US CA San Jose
- Assignee: Cisco Technology, Inc.
- Current Assignee: Cisco Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Fish & Richardson P.C.
- Main IPC: H04L12/26
- IPC: H04L12/26 ; H04L12/66 ; H04L5/16 ; H04B1/44
Abstract:
A method, system and apparatus are provided for detecting a loop-back in a physical layer on an Ethernet link. In the physical layer, a device sends a base page on the Ethernet link. The base page has at least one next page capability bit set. Subsequently, the device receives a received base page. Thereafter, for detecting the loop-back, the next page capability bit is set in the received base page is determined.
Public/Granted literature
- US20100191794A1 METHOD AND SYSTEM FOR PHY LOOP DETECTION Public/Granted day:2010-07-29
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