A method to design low complexity and low power echo and NEXT cancellers based on wordlength reduction technique is presented. A circuit architecture to implement echo and cancellers is also presented. The low complexity and low power design relies on the fact that a TH precoder can be viewed as an IIR filter with an input equal to the sum of the original input to the TH precoder and a compensation signal. The proposed design also relies on the fact that sum of the original input to the TH precoder and the compensation signal has finite levels, which can be represented in less bits than the original input of the echo and NEXT cancellers. An improved design by exploiting the statistics of the compensation signal is also proposed to further bring down the complexity and power consumption of these cancellers.