Invention Grant
- Patent Title: Pixel interpolation circuit, pixel interpolation method, and recording medium
- Patent Title (中): 像素插值电路,像素插值法和记录介质
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Application No.: US12178790Application Date: 2008-07-24
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Publication No.: US08009935B2Publication Date: 2011-08-30
- Inventor: Shohei Sakamoto
- Applicant: Shohei Sakamoto
- Applicant Address: JP Tokyo
- Assignee: Casio Computer Co., Ltd.
- Current Assignee: Casio Computer Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Holtz, Holtz, Goodman & Chick, PC
- Priority: JP2007-197117 20070730; JP2008-141945 20080530
- Main IPC: G06K9/32
- IPC: G06K9/32

Abstract:
A correlation along a horizontal direction and a correlation along a vertical direction are calculated with respect to a neighboring region around an interpolation target pixel by using respective pixel values of R pixels, G pixels, and B pixels in Bayer data. The pixel value of the G pixel to be interpolated for the interpolation target pixel is determined based upon pixel values of pixels adjacent to the interpolation target pixel along a direction exhibiting a stronger correlation between the calculated correlations. The interpolation target pixel in the Bayer data is interpolated by using the G pixel of the pixel value determined.
Public/Granted literature
- US20090034878A1 PIXEL INTERPOLATION CIRCUIT, PIXEL INTERPOLATION METHOD, AND RECORDING MEDIUM Public/Granted day:2009-02-05
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