A method for measuring active power of alternating current (AC) using a digital phase-locked loop (DPLL) includes the steps of (1) generating via the DPLL a pair of substantially mutually orthogonal sinusoid signals in response to an input voltage data signal, (2) mixing a first sinusoid signal of the pair with a current data signal of the alternating current via a first low-pass filter, (3) mixing the first sinusoid signal of the pair with a voltage signal of the alternating current via a second low-pass filter, and (4) computing an active power of the alternating current based on an output from the first low-pass filter and an output from the second low-pass filter.