Invention Grant
US08010755B2 States encoding in multi-bit flash cells for optimizing error rate
有权
在多位闪存单元中进行编码以优化错误率
- Patent Title: States encoding in multi-bit flash cells for optimizing error rate
- Patent Title (中): 在多位闪存单元中进行编码以优化错误率
-
Application No.: US12346676Application Date: 2008-12-30
-
Publication No.: US08010755B2Publication Date: 2011-08-30
- Inventor: Mark Murin
- Applicant: Mark Murin
- Applicant Address: IL Kfar Saba
- Assignee: Sandisk IL Ltd
- Current Assignee: Sandisk IL Ltd
- Current Assignee Address: IL Kfar Saba
- Agency: Davis Wright Tremaine LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F11/10

Abstract:
To store N bits of M≧2 logical pages, the bits are interleaved and the interleaved bits are programmed to [N/M] memory cells, M bits per cell. Preferably, the interleaving puts the same number of bits from each logical page into each bit-page of the [N/M] cells. When the bits are read from the cells, the bits are de-interleaved. The interleaving may be deterministic or random, and may be effected by software or by dedicated hardware.
Public/Granted literature
- US20090113120A1 States Encoding in Multi-Bit Cell Flash Memory for Optimizing Error Rate Public/Granted day:2009-04-30
Information query