Invention Grant
US08010935B2 Electronic design automation tool and method for optimizing the placement of process monitors in an integrated circuit
有权
电子设计自动化工具和方法,用于优化集成电路中过程监控器的布局
- Patent Title: Electronic design automation tool and method for optimizing the placement of process monitors in an integrated circuit
- Patent Title (中): 电子设计自动化工具和方法,用于优化集成电路中过程监控器的布局
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Application No.: US12248016Application Date: 2008-10-08
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Publication No.: US08010935B2Publication Date: 2011-08-30
- Inventor: Alexander Tetelbaum , Sreejit Chakravarty
- Applicant: Alexander Tetelbaum , Sreejit Chakravarty
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F15/04

Abstract:
An electronic design automation (EDA) tool for and method of optimizing a placement of process monitors (PMs) in an integrated circuit (IC). In one embodiment, the EDA tool includes: (1) a critical path/cell identifier configured to identify critical paths and critical cells in the IC, (2) a candidate PM position identifier coupled to the critical path/cell identifier and configured to identify a set of candidate positions for the PMs, (3) a cluster generator coupled to the critical path/cell identifier and configured to associate the critical cells to form clusters thereof and (4) a PM placement optimizer coupled to the candidate PM position identifier and the cluster generator and configured to place a PM within each of the clusters by selecting among the candidate positions.
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