Invention Grant
- Patent Title: Method of fabricating stacked semiconductor chips
- Patent Title (中): 叠层半导体芯片的制造方法
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Application No.: US12774031Application Date: 2010-05-05
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Publication No.: US08012798B2Publication Date: 2011-09-06
- Inventor: Toru Miyazaki
- Applicant: Toru Miyazaki
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Young & Thompson
- Priority: JP2009-124173 20090522
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/48

Abstract:
A method for manufacturing a semiconductor device includes forming a first opening in a substrate to expose an interconnect structure, forming a seed film on the substrate, forming a first projecting electrode buried inside the first opening protruding outward from the substrate, forming a first metal film on the first projecting electrode, attaching a first supporting substrate to the substrate with a first adhesion layer, forming a second opening in the substrate to expose the interconnect structure, forming a second projecting electrode buried inside the second opening and protruding outward from the substrate, forming a second metal film on the second projecting electrode, attaching a second supporting substrate to the substrate with a second adhesion layer, removing the first supporting substrate, the first adhesion layer, and an exposed part of the seed film, removing the second supporting substrate and the second adhesion layer, and cutting the substrate into the plurality of chips.
Public/Granted literature
- US20100297827A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2010-11-25
Information query
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