Invention Grant
US08012820B2 Ultra-thin SOI CMOS with raised epitaxial source and drain and embedded SiGe PFET extension
有权
具有凸起的外延源和漏极和嵌入式SiGe PFET扩展的超薄SOI CMOS
- Patent Title: Ultra-thin SOI CMOS with raised epitaxial source and drain and embedded SiGe PFET extension
- Patent Title (中): 具有凸起的外延源和漏极和嵌入式SiGe PFET扩展的超薄SOI CMOS
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Application No.: US13052702Application Date: 2011-03-21
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Publication No.: US08012820B2Publication Date: 2011-09-06
- Inventor: Amlan Majumdar , Gen Pei , Zhibin Ren , Dinkar Singh , Jeffrey W. Sleight
- Applicant: Amlan Majumdar , Gen Pei , Zhibin Ren , Dinkar Singh , Jeffrey W. Sleight
- Applicant Address: US NY Armonk US CA Sunnyvale
- Assignee: International Business Machines Corporation,Advanced Micro Devices, Inc.
- Current Assignee: International Business Machines Corporation,Advanced Micro Devices, Inc.
- Current Assignee Address: US NY Armonk US CA Sunnyvale
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Vazken Alexanian
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
A method for improving channel carrier mobility in ultra-thin Silicon-on-oxide (UTSOI) FET devices by integrating an embedded pFET SiGe extension with raised source/drain regions. The method includes selectively growing embedded SiGe (eSiGe) extensions in pFET regions and forming strain-free raised Si or SiGe source/drain (RSD) regions on CMOS. The eSiGe extension regions enhance hole mobility in the pFET channels and reduce resistance in the pFET extensions. The strain-free raised source/drain regions reduce contact resistance in both UTSOI pFETs and nFETs.
Public/Granted literature
- US20110165739A1 ULTRA-THIN SOI CMOS WITH RAISED EPITAXIAL SOURCE AND DRAIN AND EMBEDDED SIGE PFET EXTENSION Public/Granted day:2011-07-07
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