Invention Grant
- Patent Title: Method of forming isolation layer of flash memory device
- Patent Title (中): 形成闪存器件隔离层的方法
-
Application No.: US11954177Application Date: 2007-12-11
-
Publication No.: US08012831B2Publication Date: 2011-09-06
- Inventor: Sang Soo Lee , Cha Deok Dong , Hyun Soo Shon , Woo Ri Jeong
- Applicant: Sang Soo Lee , Cha Deok Dong , Hyun Soo Shon , Woo Ri Jeong
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Marshall, Gerstein & Borun LLP
- Priority: KR10-2007-0045974 20070511
- Main IPC: H01L21/8247
- IPC: H01L21/8247

Abstract:
An embodiment of the invention relates to a method of forming an isolation layer of a flash memory device. An isolation layer is formed using a PSZ-based material and a nitride film of liner form is deposited on a trench before the PSZ film is deposited. An oxide film can be prevented from remaining on a top of the sidewalls of a conductive film for a floating gate through an etch process employing the etch rate. The thickness of a dielectric film can be prevented from increasing when a dielectric film is deposited. Accordingly, the contact area of the floating gate and the dielectric film can be increased and the coupling ratio between the floating gate and the control gate can be improved.
Public/Granted literature
- US20080280441A1 Method of Forming Isolation Layer of Flash Memory Device Public/Granted day:2008-11-13
Information query