Invention Grant
US08012832B2 Process for manufacturing a multi-drain electronic power device integrated in semiconductor substrate and corresponding device
有权
用于制造集成在半导体衬底中的多排放电子功率器件和相应器件的工艺
- Patent Title: Process for manufacturing a multi-drain electronic power device integrated in semiconductor substrate and corresponding device
- Patent Title (中): 用于制造集成在半导体衬底中的多排放电子功率器件和相应器件的工艺
-
Application No.: US11971163Application Date: 2008-01-08
-
Publication No.: US08012832B2Publication Date: 2011-09-06
- Inventor: Mario Giuseppe Saggio , Ferruccio Frisina , Simone Rascuna
- Applicant: Mario Giuseppe Saggio , Ferruccio Frisina , Simone Rascuna
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Agency: Seed IP Law Group PLLC
- Agent Lisa K. Jorgenson; Robert Iannucci
- Priority: EP05425494 20050708
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66

Abstract:
A process manufactures a multi-drain power electronic device integrated on a semiconductor substrate of a first type of conductivity whereon a drain semiconductor layer is formed. The process includes: forming a first semiconductor epitaxial layer of the first type of conductivity of a first value of resistivity forming the drain epitaxial layer on the semiconductor substrate, forming first sub-regions of a second type of conductivity by a first selective implant step with a first implant dose, forming second sub-regions of the first type of conductivity by a second implant step with a second implant dose, and forming a surface semiconductor layer. The process also includes forming body regions of the second type of conductivity aligned with the first sub-regions, and carrying out a thermal diffusion process so that the first sub-regions form a single electrically continuous column region aligned and in electric contact with the body regions.
Public/Granted literature
Information query
IPC分类: