Invention Grant
- Patent Title: Semiconductor device and method for fabricating the same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US11270602Application Date: 2005-11-10
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Publication No.: US08013361B2Publication Date: 2011-09-06
- Inventor: Kyoji Yamashita , Katsuhiro Otani , Katsuya Arai , Daisaku Ikoma
- Applicant: Kyoji Yamashita , Katsuhiro Otani , Katsuya Arai , Daisaku Ikoma
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2004-326840 20041110
- Main IPC: H01L27/118
- IPC: H01L27/118

Abstract:
Gate electrodes 5A through 5F are formed to have the same geometry, and protruding parts of the gate electrodes 5A through 5F extend across an isolation region onto impurity diffusion regions. The gate electrode 5B and P-type impurity diffusion regions 7B6 are connected through a shared contact 9A1 to a first-level interconnect M1H, and the gate electrode 5E and N-type impurity diffusion regions 7A6 are connected through a shared contact 9A2 to a first-level interconnect M1I. In this way, contact pad parts of the gate electrodes 5A through 5F can be located apart from active regions of a substrate for MOS transistors. This suppresses the influence of the increased gate length due to hammerhead and gate flaring. As a result, transistors TrA through TrF can have substantially the same finished gate length.
Public/Granted literature
- US20060097294A1 Semiconductor device and method for fabricating the same Public/Granted day:2006-05-11
Information query
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